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RAM32X1S element on A6 LUT not processed correctly #93

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kraemv opened this issue Nov 17, 2023 · 0 comments
Open

RAM32X1S element on A6 LUT not processed correctly #93

kraemv opened this issue Nov 17, 2023 · 0 comments

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@kraemv
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kraemv commented Nov 17, 2023

Hello,

I disassembled a bitstream that contains the RAM32X1S element on the A6 LUT as shown in the screenshot.
Screenshot from 2023-11-13 13-53-48

However, FASM2BELS detects this LUTRAM as a regular LUT. The reason for this is, that the Data input of the LUT is DI2, but Fasm2bels only detects 32 bit Elements on an A LUT when DI1 is used.

The element decoding is done in fasm2bels/models/clb_models.py.

This code fragment is used for detecting RAM32X1S on the A/C LUT:

https://github.com/chipsalliance/f4pga-xc-fasm2bels/blob/bafbcd8727e0807d6a620d1cf5dd151111c4a322/fasm2bels/models/clb_models.py#L363C9-L370C48

In l.365 it checks that the input AI was used for the DI1MUX. If DI2 was used as input, it does not mark the element as a RAM32X1S. Could you add support for DI2 input?

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