-
Notifications
You must be signed in to change notification settings - Fork 1
/
Copy pathcountertb.vhd
239 lines (226 loc) · 5.26 KB
/
countertb.vhd
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
-- Test bench for Counter Exercise
entity CounterTB is
end;
library design_library;
library IEEE;
use IEEE.Std_logic_1164.all;
architecture Bench of CounterTB is
component Counter
port (Clock, Reset, Enable, Load, UpDn: in Std_logic;
Data: in Std_logic_vector(7 downto 0);
Q: out Std_logic_vector(7 downto 0));
end component;
signal Clock, Reset, Enable, Load, UpDn: Std_logic;
signal Data, Q: Std_logic_vector(7 downto 0);
signal OK: Boolean := True;
begin
Clk: process
begin
while now <= 3000 NS loop
Clock <= '0';
wait for 5 NS;
Clock <= '1';
wait for 5 NS;
end loop;
wait;
end process;
Stim: process
begin
Enable <= '0';
Load <= '0';
UpDn <= '1';
Reset <= '1';
wait for 10 ns; -- Should be reset
Reset <= '0';
wait for 10 ns; -- Should do nothing - not enabled
Enable <= '1';
wait for 20 ns; -- Should count up to 2
UpDn <= '0';
wait for 40 ns; -- Should count downto 254
UpDn <= '1';
wait for 40 ns; -- Should count up to 2
Reset <= '1';
wait for 10 ns; -- Should be reset, overriding enable
Reset <= '0';
wait for 30 ns; -- Should count up to 3
Enable <= '0';
wait for 10 ns; -- Should do nothing - not enabled
Data <= "01111111";
Load <= '1';
wait for 10 ns; -- Should do nothing - not enabled
Load <= '0';
Enable <= '1';
wait for 10 ns; -- Should count from 3 to 4
Load <= '1';
wait for 10 ns; -- Should load 127
Load <= '0';
wait for 20 ns; -- Should count from 127 to 129
Enable <= '0';
wait for 10 ns; -- Should do nothing - not enabled
UpDn <= '0';
wait for 10 ns; -- Should do nothing - not enabled
Enable <= '1';
wait for 20 ns; -- Should count down from 129 to 127
Data <= "11110000";
Load <= '1';
wait for 10 ns; -- Should load
Reset <= '1';
wait for 10 ns; -- Should be reset, overriding load
Load <= '0';
UpDn <= '1';
wait for 10 ns; -- Should stay at 0 - still reset
Reset <= '0';
wait for 2560 ns; -- Should count from 0 round to 0
Enable <= '0';
wait;
end process;
G1: Counter port map (Clock, Reset, Enable, Load, UpDn, Data, Q);
Check: process
begin
wait for 9 ns;
if Q /= "00000000" then
OK <= False;
end if;
wait for 10 ns;
if Q /= "00000000" then
OK <= False;
end if;
wait for 10 ns;
if Q /= "00000001" then
OK <= False;
end if;
wait for 10 ns;
if Q /= "00000010" then
OK <= False;
end if;
wait for 10 ns;
if Q /= "00000001" then
OK <= False;
end if;
wait for 10 ns;
if Q /= "00000000" then
OK <= False;
end if;
wait for 10 ns;
if Q /= "11111111" then
OK <= False;
end if;
wait for 10 ns;
if Q /= "11111110" then
OK <= False;
end if;
wait for 10 ns;
if Q /= "11111111" then
OK <= False;
end if;
wait for 10 ns;
if Q /= "00000000" then
OK <= False;
end if;
wait for 10 ns;
if Q /= "00000001" then
OK <= False;
end if;
wait for 10 ns;
if Q /= "00000010" then
OK <= False;
end if;
wait for 10 ns;
if Q /= "00000000" then
OK <= False;
end if;
wait for 10 ns;
if Q /= "00000001" then
OK <= False;
end if;
wait for 10 ns;
if Q /= "00000010" then
OK <= False;
end if;
wait for 10 ns;
if Q /= "00000011" then
OK <= False;
end if;
wait for 10 ns;
if Q /= "00000011" then
OK <= False;
end if;
wait for 10 ns;
if Q /= "00000011" then
OK <= False;
end if;
wait for 10 ns;
if Q /= "00000100" then
OK <= False;
end if;
wait for 10 ns;
if Q /= "01111111" then
OK <= False;
end if;
wait for 10 ns;
if Q /= "10000000" then
OK <= False;
end if;
wait for 10 ns;
if Q /= "10000001" then
OK <= False;
end if;
wait for 10 ns;
if Q /= "10000001" then
OK <= False;
end if;
wait for 10 ns;
if Q /= "10000001" then
OK <= False;
end if;
wait for 10 ns;
if Q /= "10000000" then
OK <= False;
end if;
wait for 10 ns;
if Q /= "01111111" then
OK <= False;
end if;
wait for 10 ns;
if Q /= "11110000" then
OK <= False;
end if;
wait for 10 ns;
if Q /= "00000000" then
OK <= False;
end if;
wait for 10 ns;
if Q /= "00000000" then
OK <= False;
end if;
wait for 10 ns;
if Q /= "00000001" then
OK <= False;
end if;
wait for 10 ns;
if Q /= "00000010" then
OK <= False;
end if;
wait for 10 ns;
if Q /= "00000011" then
OK <= False;
end if;
wait for 10 ns;
if Q /= "00000100" then
OK <= False;
end if;
wait for 2500 ns;
if Q /= "11111110" then
OK <= False;
end if;
wait for 10 ns;
if Q /= "11111111" then
OK <= False;
end if;
wait for 10 ns;
if Q /= "00000000" then
OK <= False;
end if;
wait;
end process;
end;