.gitmodules

[submodule "source/fpga_interconnect"]
	path = source/hVHDL_fpga_interconnect
	url = https://github.com/hVHDL/hVHDL_fpga_interconnect.git 
	main = origin/main
[submodule "source/math_library"]
	path = source/hVHDL_fixed_point
	url = https://github.com/hVHDL/hVHDL_math_library.git 
	main = origin/main
[submodule "source/vhdl_float"]
	path = source/hVHDL_floating_point
	url = https://github.com/hVHDL/hVHDL_floating_point.git 
	main = origin/main
[submodule "source/uart"]
	path = source/hVHDL_uart
	url = https://github.com/hVHDL/hVHDL_uart.git 
	main = origin/main
[submodule "source/memory_library"]
	path = source/hVHDL_memory_library
	url = https://github.com/hVHDL/hVHDL_memory_library.git 
	main = origin/main
[submodule "source/hVHDL_analog_to_digital_drivers"]
	path = source/hVHDL_analog_to_digital_drivers
	url = https://github.com/hVHDL/hVHDL_analog_to_digital_drivers.git
	main = origin/main
[submodule "ac_power_supply_hw_analysis"]
	path = ac_power_supply_hw_analysis
    url = https://github.com/johonkanen/ac_power_supply_hw_analysis.git 
    main = origin/main
[submodule "fpga_uart_pc_software"]
	path = fpga_uart_pc_software
	url = https://github.com/johonkanen/fpga_uart_pc_software.git
    main = origin/main
[submodule "source/fpga_communication"]
	path = source/fpga_communication
	url = https://github.com/johonkanen/fpga_communication.git
[submodule "source/vhdl_serial"]
	path = source/vhdl_serial
	url = https://github.com/johonkanen/vhdl_serial.git