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Place and Route fails with below error: [DRC BIVC-1] Bank IO standard Vcc: Conflicting Vcc voltages in bank 35. For example, the following two ports in this bank have conflicting VCCOs: pcie_x4_rst_n (LVCMOS15, requiring VCCO=1.500) and pcie_clkreq_n (LVCMOS33, requiring VCCO=3.300)
The text was updated successfully, but these errors were encountered:
For
./make.py --board=acorn_pcie --build
command:[DRC BIVC-1] Bank IO standard Vcc: Conflicting Vcc voltages in bank 35. For example, the following two ports in this bank have conflicting VCCOs:
pcie_x4_rst_n (LVCMOS15, requiring VCCO=1.500) and pcie_clkreq_n (LVCMOS33, requiring VCCO=3.300)
The text was updated successfully, but these errors were encountered: