[RTGTest] Improved register representation

include/circt-c/Dialect/RTGTest.h

@@ -45,6 +45,201 @@ MLIR_CAPI_EXPORTED MlirAttribute rtgtestCPUAttrGet(MlirContext ctxt,
 /// Returns the core ID represented by the CPU attribute.
 MLIR_CAPI_EXPORTED unsigned rtgtestCPUAttrGetId(MlirAttribute attr);
 
+// Registers.
+//===----------------------------------------------------------------------===//
+
+/// If the type is an RTGTest RegZeroAttr.
+MLIR_CAPI_EXPORTED bool rtgtestAttrIsARegZero(MlirAttribute attr);
+
+/// Creates an RTGTest RegZero attribute in the context.
+MLIR_CAPI_EXPORTED MlirAttribute rtgtestRegZeroAttrGet(MlirContext ctxt);
+
+/// If the attribute is an RTGTest RegRaAttr.
+MLIR_CAPI_EXPORTED bool rtgtestAttrIsARegRa(MlirAttribute attr);
+
+/// Creates an RTGTest RegRa attribute in the context.
+MLIR_CAPI_EXPORTED MlirAttribute rtgtestRegRaAttrGet(MlirContext ctxt);
+
+/// If the attribute is an RTGTest RegSpAttr.
+MLIR_CAPI_EXPORTED bool rtgtestAttrIsARegSp(MlirAttribute attr);
+
+/// Creates an RTGTest RegSp attribute in the context.
+MLIR_CAPI_EXPORTED MlirAttribute rtgtestRegSpAttrGet(MlirContext ctxt);
+
+/// If the attribute is an RTGTest RegGpAttr.
+MLIR_CAPI_EXPORTED bool rtgtestAttrIsARegGp(MlirAttribute attr);
+
+/// Creates an RTGTest RegGp attribute in the context.
+MLIR_CAPI_EXPORTED MlirAttribute rtgtestRegGpAttrGet(MlirContext ctxt);
+
+/// If the attribute is an RTGTest RegTpAttr.
+MLIR_CAPI_EXPORTED bool rtgtestAttrIsARegTp(MlirAttribute attr);
+
+/// Creates an RTGTest RegTp attribute in the context.
+MLIR_CAPI_EXPORTED MlirAttribute rtgtestRegTpAttrGet(MlirContext ctxt);
+
+/// If the attribute is an RTGTest RegT0Attr.
+MLIR_CAPI_EXPORTED bool rtgtestAttrIsARegT0(MlirAttribute attr);
+
+/// Creates an RTGTest RegT0 attribute in the context.
+MLIR_CAPI_EXPORTED MlirAttribute rtgtestRegT0AttrGet(MlirContext ctxt);
+
+/// If the attribute is an RTGTest RegT1Attr.
+MLIR_CAPI_EXPORTED bool rtgtestAttrIsARegT1(MlirAttribute attr);
+
+/// Creates an RTGTest RegT1 attribute in the context.
+MLIR_CAPI_EXPORTED MlirAttribute rtgtestRegT1AttrGet(MlirContext ctxt);
+
+/// If the attribute is an RTGTest RegT2Attr.
+MLIR_CAPI_EXPORTED bool rtgtestAttrIsARegT2(MlirAttribute attr);
+
+/// Creates an RTGTest RegT2 attribute in the context.
+MLIR_CAPI_EXPORTED MlirAttribute rtgtestRegT2AttrGet(MlirContext ctxt);
+
+/// If the attribute is an RTGTest RegS0Attr.
+MLIR_CAPI_EXPORTED bool rtgtestAttrIsARegS0(MlirAttribute attr);
+
+/// Creates an RTGTest RegS0 attribute in the context.
+MLIR_CAPI_EXPORTED MlirAttribute rtgtestRegS0AttrGet(MlirContext ctxt);
+
+/// If the attribute is an RTGTest RegS1Attr.
+MLIR_CAPI_EXPORTED bool rtgtestAttrIsARegS1(MlirAttribute attr);
+
+/// Creates an RTGTest RegS1 attribute in the context.
+MLIR_CAPI_EXPORTED MlirAttribute rtgtestRegS1AttrGet(MlirContext ctxt);
+
+/// If the attribute is an RTGTest RegA0Attr.
+MLIR_CAPI_EXPORTED bool rtgtestAttrIsARegA0(MlirAttribute attr);
+
+/// Creates an RTGTest RegA0 attribute in the context.
+MLIR_CAPI_EXPORTED MlirAttribute rtgtestRegA0AttrGet(MlirContext ctxt);
+
+/// If the attribute is an RTGTest RegA1Attr.
+MLIR_CAPI_EXPORTED bool rtgtestAttrIsARegA1(MlirAttribute attr);
+
+/// Creates an RTGTest RegA1 attribute in the context.
+MLIR_CAPI_EXPORTED MlirAttribute rtgtestRegA1AttrGet(MlirContext ctxt);
+
+/// If the attribute is an RTGTest RegA2Attr.
+MLIR_CAPI_EXPORTED bool rtgtestAttrIsARegA2(MlirAttribute attr);
+
+/// Creates an RTGTest RegA2 attribute in the context.
+MLIR_CAPI_EXPORTED MlirAttribute rtgtestRegA2AttrGet(MlirContext ctxt);
+
+/// If the attribute is an RTGTest RegA3Attr.
+MLIR_CAPI_EXPORTED bool rtgtestAttrIsARegA3(MlirAttribute attr);
+
+/// Creates an RTGTest RegA3 attribute in the context.
+MLIR_CAPI_EXPORTED MlirAttribute rtgtestRegA3AttrGet(MlirContext ctxt);
+
+/// If the attribute is an RTGTest RegA4Attr.
+MLIR_CAPI_EXPORTED bool rtgtestAttrIsARegA4(MlirAttribute attr);
+
+/// Creates an RTGTest RegA4 attribute in the context.
+MLIR_CAPI_EXPORTED MlirAttribute rtgtestRegA4AttrGet(MlirContext ctxt);
+
+/// If the attribute is an RTGTest RegA5Attr.
+MLIR_CAPI_EXPORTED bool rtgtestAttrIsARegA5(MlirAttribute attr);
+
+/// Creates an RTGTest RegA5 attribute in the context.
+MLIR_CAPI_EXPORTED MlirAttribute rtgtestRegA5AttrGet(MlirContext ctxt);
+
+/// If the attribute is an RTGTest RegA6Attr.
+MLIR_CAPI_EXPORTED bool rtgtestAttrIsARegA6(MlirAttribute attr);
+
+/// Creates an RTGTest RegA6 attribute in the context.
+MLIR_CAPI_EXPORTED MlirAttribute rtgtestRegA6AttrGet(MlirContext ctxt);
+
+/// If the attribute is an RTGTest RegA7Attr.
+MLIR_CAPI_EXPORTED bool rtgtestAttrIsARegA7(MlirAttribute attr);
+
+/// Creates an RTGTest RegA7 attribute in the context.
+MLIR_CAPI_EXPORTED MlirAttribute rtgtestRegA7AttrGet(MlirContext ctxt);
+
+/// If the attribute is an RTGTest RegS2Attr.
+MLIR_CAPI_EXPORTED bool rtgtestAttrIsARegS2(MlirAttribute attr);
+
+/// Creates an RTGTest RegS2 attribute in the context.
+MLIR_CAPI_EXPORTED MlirAttribute rtgtestRegS2AttrGet(MlirContext ctxt);
+
+/// If the attribute is an RTGTest RegS3Attr.
+MLIR_CAPI_EXPORTED bool rtgtestAttrIsARegS3(MlirAttribute attr);
+
+/// Creates an RTGTest RegS3 attribute in the context.
+MLIR_CAPI_EXPORTED MlirAttribute rtgtestRegS3AttrGet(MlirContext ctxt);
+
+/// If the attribute is an RTGTest RegS4Attr.
+MLIR_CAPI_EXPORTED bool rtgtestAttrIsARegS4(MlirAttribute attr);
+
+/// Creates an RTGTest RegS4 attribute in the context.
+MLIR_CAPI_EXPORTED MlirAttribute rtgtestRegS4AttrGet(MlirContext ctxt);
+
+/// If the attribute is an RTGTest RegS5Attr.
+MLIR_CAPI_EXPORTED bool rtgtestAttrIsARegS5(MlirAttribute attr);
+
+/// Creates an RTGTest RegS5 attribute in the context.
+MLIR_CAPI_EXPORTED MlirAttribute rtgtestRegS5AttrGet(MlirContext ctxt);
+
+/// If the attribute is an RTGTest RegS6Attr.
+MLIR_CAPI_EXPORTED bool rtgtestAttrIsARegS6(MlirAttribute attr);
+
+/// Creates an RTGTest RegS6 attribute in the context.
+MLIR_CAPI_EXPORTED MlirAttribute rtgtestRegS6AttrGet(MlirContext ctxt);
+
+/// If the attribute is an RTGTest RegS7Attr.
+MLIR_CAPI_EXPORTED bool rtgtestAttrIsARegS7(MlirAttribute attr);
+
+/// Creates an RTGTest RegS7 attribute in the context.
+MLIR_CAPI_EXPORTED MlirAttribute rtgtestRegS7AttrGet(MlirContext ctxt);
+
+/// If the attribute is an RTGTest RegS8Attr.
+MLIR_CAPI_EXPORTED bool rtgtestAttrIsARegS8(MlirAttribute attr);
+
+/// Creates an RTGTest RegS8 attribute in the context.
+MLIR_CAPI_EXPORTED MlirAttribute rtgtestRegS8AttrGet(MlirContext ctxt);
+
+/// If the attribute is an RTGTest RegS9Attr.
+MLIR_CAPI_EXPORTED bool rtgtestAttrIsARegS9(MlirAttribute attr);
+
+/// Creates an RTGTest RegS9 attribute in the context.
+MLIR_CAPI_EXPORTED MlirAttribute rtgtestRegS9AttrGet(MlirContext ctxt);
+
+/// If the attribute is an RTGTest RegS10Attr.
+MLIR_CAPI_EXPORTED bool rtgtestAttrIsARegS10(MlirAttribute attr);
+
+/// Creates an RTGTest RegS10 attribute in the context.
+MLIR_CAPI_EXPORTED MlirAttribute rtgtestRegS10AttrGet(MlirContext ctxt);
+
+/// If the attribute is an RTGTest RegS11Attr.
+MLIR_CAPI_EXPORTED bool rtgtestAttrIsARegS11(MlirAttribute attr);
+
+/// Creates an RTGTest RegS11 attribute in the context.
+MLIR_CAPI_EXPORTED MlirAttribute rtgtestRegS11AttrGet(MlirContext ctxt);
+
+/// If the attribute is an RTGTest RegT3Attr.
+MLIR_CAPI_EXPORTED bool rtgtestAttrIsARegT3(MlirAttribute attr);
+
+/// Creates an RTGTest RegT3 attribute in the context.
+MLIR_CAPI_EXPORTED MlirAttribute rtgtestRegT3AttrGet(MlirContext ctxt);
+
+/// If the attribute is an RTGTest RegT4Attr.
+MLIR_CAPI_EXPORTED bool rtgtestAttrIsARegT4(MlirAttribute attr);
+
+/// Creates an RTGTest RegT4 attribute in the context.
+MLIR_CAPI_EXPORTED MlirAttribute rtgtestRegT4AttrGet(MlirContext ctxt);
+
+/// If the attribute is an RTGTest RegT5Attr.
+MLIR_CAPI_EXPORTED bool rtgtestAttrIsARegT5(MlirAttribute attr);
+
+/// Creates an RTGTest RegT5 attribute in the context.
+MLIR_CAPI_EXPORTED MlirAttribute rtgtestRegT5AttrGet(MlirContext ctxt);
+
+/// If the attribute is an RTGTest RegT6Attr.
+MLIR_CAPI_EXPORTED bool rtgtestAttrIsARegT6(MlirAttribute attr);
+
+/// Creates an RTGTest RegT6 attribute in the context.
+MLIR_CAPI_EXPORTED MlirAttribute rtgtestRegT6AttrGet(MlirContext ctxt);
+
 #ifdef __cplusplus
 }
 #endif

include/circt/Dialect/RTG/IR/CMakeLists.txt

@@ -24,6 +24,16 @@ add_public_tablegen_target(CIRCTRTGAttrInterfacesIncGen)
 add_dependencies(circt-headers CIRCTRTGAttrInterfacesIncGen)
 
 set(LLVM_TARGET_DEFINITIONS RTGISAAssemblyInterfaces.td)
+mlir_tablegen(RTGISAAssemblyAttrInterfaces.h.inc -gen-attr-interface-decls)
+mlir_tablegen(RTGISAAssemblyAttrInterfaces.cpp.inc -gen-attr-interface-defs)
+add_public_tablegen_target(CIRCTRTGISAAssemblyAttrInterfacesIncGen)
+add_dependencies(circt-headers CIRCTRTGISAAssemblyAttrInterfacesIncGen)
+
+mlir_tablegen(RTGISAAssemblyTypeInterfaces.h.inc -gen-type-interface-decls)
+mlir_tablegen(RTGISAAssemblyTypeInterfaces.cpp.inc -gen-type-interface-defs)
+add_public_tablegen_target(CIRCTRTGISAAssemblyTypeInterfacesIncGen)
+add_dependencies(circt-headers CIRCTRTGISAAssemblyTypeInterfacesIncGen)
+
 mlir_tablegen(RTGISAAssemblyOpInterfaces.h.inc -gen-op-interface-decls)
 mlir_tablegen(RTGISAAssemblyOpInterfaces.cpp.inc -gen-op-interface-defs)
 add_public_tablegen_target(CIRCTRTGISAAssemblyOpInterfacesIncGen)

include/circt/Dialect/RTG/IR/RTGISAAssemblyAttrInterfaces.h

@@ -0,0 +1,24 @@
+//===- RTGISAAssemblyAttrInterfaces.h - Interf. for ISA ASM RTG -*- C++ -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+//
+// This file declares attr interfaces for the RTG Dialect that are specific to
+// ISA Assembly tests.
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef CIRCT_DIALECT_RTG_IR_RTGISAASSEMBLYATTRINTERFACES_H
+#define CIRCT_DIALECT_RTG_IR_RTGISAASSEMBLYATTRINTERFACES_H
+
+#include "circt/Dialect/RTG/IR/RTGISAAssemblyTypeInterfaces.h"
+#include "mlir/IR/Attributes.h"
+#include "mlir/IR/BuiltinAttributeInterfaces.h"
+#include "llvm/ADT/APInt.h"
+
+#include "circt/Dialect/RTG/IR/RTGISAAssemblyAttrInterfaces.h.inc"
+
+#endif // CIRCT_DIALECT_RTG_IR_RTGISAASSEMBLYATTRINTERFACES_H

include/circt/Dialect/RTG/IR/RTGISAAssemblyInterfaces.td

@@ -10,51 +10,38 @@
 #define CIRCT_DIALECT_RTG_IR_RTGISAASSEMBLYINTERFACES_TD
 
 include "mlir/IR/Interfaces.td"
-include "mlir/IR/OpBase.td"
+include "mlir/IR/BuiltinAttributeInterfaces.td"
 
-def RegisterOpInterface : OpInterface<"RegisterOpInterface"> {
+def RegisterAttrInterface : AttrInterface<"RegisterAttrInterface", [TypedAttrInterface]> {
   let description = [{
-    This interface should be implemented by operations that represent
-    ISA registers. It is used for register allocation, emission, etc.
-
-    Virtual registers are indicated by a register index of ~0.
+    This interface should be implemented by attributes that represent
+    ISA registers. It is used for elaboration, register allocation, emission,
+    etc.
   }];
   let cppNamespace = "::circt::rtg";
 
   let methods = [
-    InterfaceMethod<[{
-        Returns the bitvector of the Dialect's canonical register indices for
-        which this operation allows.
-      }],
-      "::llvm::BitVector", "getAllowedRegs">,
-    InterfaceMethod<[{
-        Returns the Dialect's canonical register index of the register if it
-        selects a specific one, or ~0 if it isn't fixed yet.
-      }],
-      "unsigned", "getFixedReg">,
-    InterfaceMethod<[{
-        Sets this operation to use a specific register given by the Dialect's
-        canonical register index.
-      }],
-      "void", "setFixedReg", (ins "unsigned":$reg)>,
     InterfaceMethod<[{
         Returns the class specific index of the register. This translates from
         the flat internal representation to the architectural representation.
       }],
       "unsigned", "getClassIndex">,
-    InterfaceMethod<[{
-        Returns the class specific index of the register. This translates from
-        the flat internal representation to the architectural representation.
-        This returns an APInt for the common binary encoding.
-      }],
-      "llvm::APInt", "getClassIndexBinary">,
     InterfaceMethod<[{
         Returns a suitable string for use in assembly format.
       }],
-      "std::string", "getRegisterAssembly">,
+      "llvm::StringLiteral", "getRegisterAssembly">,
   ];
 }
 
+def RegisterTypeInterface : TypeInterface<"RegisterTypeInterface"> {
+  let description = [{
+    This interface should be implemented by types that represent
+    ISA registers. It is used for elaboration, register allocation, emission,
+    etc.
+  }];
+  let cppNamespace = "::circt::rtg";
+}
+
 def InstructionOpInterface : OpInterface<"InstructionOpInterface"> {
   let description = [{
     This interface should be implemented by operations that represent

include/circt/Dialect/RTG/IR/RTGISAAssemblyTypeInterfaces.h

@@ -0,0 +1,22 @@
+//===- RTGISAAssemblyTypeInterfaces.h - Interf. for ISA ASM RTG -*- C++ -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+//
+// This file declares type interfaces for the RTG Dialect that are specific to
+// ISA Assembly tests.
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef CIRCT_DIALECT_RTG_IR_RTGISAASSEMBLYTYPEINTERFACES_H
+#define CIRCT_DIALECT_RTG_IR_RTGISAASSEMBLYTYPEINTERFACES_H
+
+#include "circt/Support/LLVM.h"
+#include "mlir/IR/Types.h"
+
+#include "circt/Dialect/RTG/IR/RTGISAAssemblyTypeInterfaces.h.inc"
+
+#endif // CIRCT_DIALECT_RTG_IR_RTGISAASSEMBLYTYPEINTERFACES_H

include/circt/Dialect/RTG/IR/RTGOps.h

@@ -15,6 +15,8 @@
 
 #include "circt/Dialect/RTG/IR/RTGAttrInterfaces.h"
 #include "circt/Dialect/RTG/IR/RTGDialect.h"
+#include "circt/Dialect/RTG/IR/RTGISAAssemblyAttrInterfaces.h"
+#include "circt/Dialect/RTG/IR/RTGISAAssemblyTypeInterfaces.h"
 #include "circt/Dialect/RTG/IR/RTGTypeInterfaces.h"
 #include "circt/Dialect/RTG/IR/RTGTypes.h"
 #include "circt/Support/LLVM.h"

include/circt/Dialect/RTG/IR/RTGOps.td

@@ -19,6 +19,7 @@ include "mlir/Interfaces/InferTypeOpInterface.td"
 include "mlir/Interfaces/SideEffectInterfaces.td"
 include "mlir/Interfaces/InferTypeOpInterface.td"
 include "circt/Dialect/RTG/IR/RTGInterfaces.td"
+include "circt/Dialect/RTG/IR/RTGISAAssemblyInterfaces.td"
 
 // Base class for the operation in this dialect.
 class RTGOp<string mnemonic, list<Trait> traits = []> :
@@ -324,6 +325,44 @@ def BagUniqueSizeOp : RTGOp<"bag_unique_size", [Pure]> {
   }];
 }
 
+//===- ISA Register Handling Operations -----------------------------------===//
+
+def FixedRegisterOp : RTGOp<"fixed_reg", [
+  Pure, ConstantLike,
+  DeclareOpInterfaceMethods<InferTypeOpInterface>,
+]> {
+  let summary = "returns a value representing a fixed register";
+  let description = [{
+    This operation creates a value representing the register given as the 'reg'
+    attribute. This is always a concrete ISA register.
+    The return type always matches the register attribute type.
+  }];
+
+  let arguments = (ins RegisterAttrInterface:$reg);
+  let results = (outs RegisterTypeInterface:$result);
+
+  let assemblyFormat = "$reg attr-dict";
+  let hasFolder = 1;
+}
+
+def VirtualRegisterOp : RTGOp<"virtual_reg", [
+  DeclareOpInterfaceMethods<InferTypeOpInterface>,
+]> {
+  let summary = "returns a value representing a virtual register";
+  let description = [{
+    This operation creates a value representing a virtual register. The
+    'allowedRegisters' attribute specifies the concrete registers that may be
+    chosen during register allocation.
+  }];
+
+  // ArrayAttr of RegisterAttrInterfaces
+  let arguments = (ins ArrayAttr:$allowedRegs);
+  let results = (outs RegisterTypeInterface:$result);
+
+  let assemblyFormat = "$allowedRegs attr-dict";
+  let hasVerifier = 1;
+}
+
 //===- Test Specification Operations --------------------------------------===//
 
 def TestOp : RTGOp<"test", [